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amba
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drwxr-xr-x
2021-04-21 07:33
bcma
[ DIR ]
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byteorder
[ DIR ]
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can
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clk
[ DIR ]
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decompress
[ DIR ]
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dma
[ DIR ]
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fpga
[ DIR ]
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fsl
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gpio
[ DIR ]
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hsi
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i2c
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iio
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input
[ DIR ]
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irqchip
[ DIR ]
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isdn
[ DIR ]
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lockd
[ DIR ]
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mfd
[ DIR ]
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mlx4
[ DIR ]
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mlx5
[ DIR ]
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mmc
[ DIR ]
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mtd
[ DIR ]
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netfilter
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netfilter_arp
[ DIR ]
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netfilter_bridge
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netfilter_ipv4
[ DIR ]
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netfilter_ipv6
[ DIR ]
drwxr-xr-x
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perf
[ DIR ]
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phy
[ DIR ]
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pinctrl
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platform_data
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power
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qed
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raid
[ DIR ]
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regulator
[ DIR ]
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reset
[ DIR ]
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rtc
[ DIR ]
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sched
[ DIR ]
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soc
[ DIR ]
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spi
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ssb
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sunrpc
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ulpi
[ DIR ]
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unaligned
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usb
[ DIR ]
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uwb
[ DIR ]
drwxr-xr-x
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wimax
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drwxr-xr-x
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8250_pci.h
999
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2016-01-11 00:01
a.out.h
315
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acct.h
2.51
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acpi.h
28.55
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2021-04-16 11:57
acpi_dma.h
3.22
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2016-01-11 00:01
acpi_pmtmr.h
635
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2016-01-11 00:01
adb.h
1.75
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adfs_fs.h
535
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aer.h
1.66
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agp_backend.h
3.45
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agpgart.h
3.82
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ahci_platform.h
1.49
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aio.h
879
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alarmtimer.h
1.64
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altera_jtaguart.h
340
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altera_uart.h
358
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amd-iommu.h
5.93
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amifd.h
1.95
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amifdreg.h
2.61
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amigaffs.h
2.86
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anon_inodes.h
455
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apm-emulation.h
1.54
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apm_bios.h
2.68
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apple_bl.h
459
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arm-cci.h
2.01
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arm-smccc.h
9.44
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2021-04-16 11:57
asn1.h
1.99
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2016-01-11 00:01
asn1_ber_bytecode.h
2.72
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asn1_decoder.h
675
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assoc_array.h
3.07
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assoc_array_priv.h
5.49
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2016-01-11 00:01
async.h
1.65
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2016-01-11 00:01
async_tx.h
6.76
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2016-01-11 00:01
ata.h
29.47
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2021-04-16 11:57
ata_platform.h
690
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2016-01-11 00:01
atalk.h
4.32
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2021-04-16 11:57
ath9k_platform.h
1.36
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2016-01-11 00:01
atm.h
248
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2016-01-11 00:01
atm_suni.h
253
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2016-01-11 00:01
atm_tcp.h
472
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2016-01-11 00:01
atmdev.h
9.52
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2016-01-11 00:01
atmel-mci.h
1.31
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2016-01-11 00:01
atmel-ssc.h
9.68
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2016-01-11 00:01
atmel_pdc.h
1.47
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2016-01-11 00:01
atmel_serial.h
7.66
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2016-01-11 00:01
atmel_tc.h
11.33
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2016-01-11 00:01
atomic.h
14.97
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2021-04-16 11:57
attribute_container.h
2.47
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2016-01-11 00:01
audit.h
17.56
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2021-04-16 11:57
auto_dev-ioctl.h
5.06
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2016-01-11 00:01
auto_fs.h
657
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2016-01-11 00:01
auxvec.h
265
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average.h
1.48
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2016-01-11 00:01
b1pcmcia.h
666
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backing-dev-defs.h
7.81
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2021-04-16 11:57
backing-dev.h
14.39
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backlight.h
5.14
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2016-01-11 00:01
balloon_compaction.h
6.91
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2016-01-11 00:01
basic_mmio_gpio.h
2.23
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bcd.h
520
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2016-01-11 00:01
bch.h
2.6
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2016-01-11 00:01
bcm47xx_nvram.h
1.19
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bcm47xx_wdt.h
617
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bfin_mac.h
559
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binfmts.h
3.96
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2016-01-11 00:01
bio.h
21.38
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bit_spinlock.h
2.27
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2016-01-11 00:01
bitmap.h
13.04
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2021-04-16 11:57
bitops.h
5.46
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bitrev.h
2
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bits.h
833
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blk-cgroup.h
21.95
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2016-01-11 00:01
blk-iopoll.h
1.13
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2016-01-11 00:01
blk-mq.h
7.56
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2021-04-16 11:57
blk_types.h
8.43
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2016-01-11 00:01
blkdev.h
50.19
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2021-04-16 11:57
blkpg.h
397
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2016-01-11 00:01
blktrace_api.h
3.4
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2021-04-16 11:57
blockgroup_lock.h
1.14
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2016-01-11 00:01
bma150.h
1.89
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2016-01-11 00:01
bootmem.h
10.61
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bottom_half.h
764
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bpf.h
7.13
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2021-04-16 11:57
brcmphy.h
8.66
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2016-01-11 00:01
bsearch.h
236
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bsg-lib.h
1.98
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bsg.h
734
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btree-128.h
2.63
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2016-01-11 00:01
btree-type.h
3.86
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2016-01-11 00:01
btree.h
6.8
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btrfs.h
106
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buffer_head.h
12.73
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2021-04-16 11:57
bug.h
3.63
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2021-04-16 11:57
c2port.h
1.59
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2016-01-11 00:01
cache.h
2.09
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2021-04-16 11:57
cacheinfo.h
3.04
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capability.h
7.68
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cb710.h
5.69
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2016-01-11 00:01
cciss_ioctl.h
1014
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2016-01-11 00:01
ccp.h
15.37
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2016-01-11 00:01
cdev.h
787
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cdrom.h
8.66
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cfag12864b.h
2.1
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2016-01-11 00:01
cgroup-defs.h
16.01
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2021-04-16 11:57
cgroup.h
20.73
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2021-04-16 11:57
cgroup_subsys.h
1.39
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2016-01-11 00:01
circ_buf.h
1.05
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2016-01-11 00:01
cleancache.h
3.86
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2016-01-11 00:01
clk-provider.h
27.54
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2021-04-16 11:57
clk.h
13.74
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2016-01-11 00:01
clkdev.h
1.32
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2016-01-11 00:01
clksrc-dbx500-prcmu.h
455
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2016-01-11 00:01
clock_cooling.h
2.06
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2016-01-11 00:01
clockchips.h
7.3
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2016-01-11 00:01
clocksource.h
7.59
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2016-01-11 00:01
cm4000_cs.h
160
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2016-01-11 00:01
cma.h
920
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2016-01-11 00:01
cmdline-parser.h
1.17
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cn_proc.h
1.85
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2016-01-11 00:01
cnt32_to_63.h
3.6
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2016-01-11 00:01
coda.h
2.16
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2021-04-16 11:57
coda_psdev.h
2.97
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2021-04-16 11:57
compaction.h
5.74
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2021-04-16 11:57
compat.h
25.59
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compiler-clang.h
525
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compiler-gcc.h
11.09
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compiler-intel.h
1.13
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2016-01-11 00:01
compiler.h
16.7
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2021-04-16 11:57
completion.h
3.47
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2016-01-11 00:01
component.h
1.14
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2016-01-11 00:01
concap.h
3.69
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2016-01-11 00:01
configfs.h
6.88
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2016-01-11 00:01
connector.h
2.43
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2016-01-11 00:01
console.h
6.08
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console_struct.h
5.13
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2016-01-11 00:01
consolemap.h
1
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container.h
668
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2016-01-11 00:01
context_tracking.h
3.15
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2016-01-11 00:01
context_tracking_state.h
1.34
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2016-01-11 00:01
cordic.h
1.75
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2016-01-11 00:01
coredump.h
744
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coresight.h
8.7
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2016-01-11 00:01
count_zeros.h
1.62
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2016-01-11 00:01
cper.h
12.57
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2016-01-11 00:01
cpu.h
10.25
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cpu_cooling.h
3.88
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2016-01-11 00:01
cpu_pm.h
2.78
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cpu_rmap.h
1.86
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cpufeature.h
1.85
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cpufreq-dt.h
569
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cpufreq.h
19.01
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cpuidle.h
8.07
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cpumask.h
24.06
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cpuset.h
6.11
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cputime.h
334
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crash_dump.h
2.82
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crc-ccitt.h
330
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crc-itu-t.h
613
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crc-t10dif.h
376
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crc16.h
622
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crc32.h
2.83
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crc32c.h
254
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crc7.h
277
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crc8.h
3.65
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cred.h
12.26
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crypto.h
62.6
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cryptohash.h
448
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2016-01-11 00:01
cs5535.h
6.28
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ctype.h
1.69
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cuda.h
462
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2016-01-11 00:01
cyclades.h
10.26
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2016-01-11 00:01
davinci_emac.h
1.12
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2016-01-11 00:01
dax.h
1.45
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2016-01-11 00:01
dca.h
2.62
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dcache.h
18.9
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dccp.h
10.69
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dcookies.h
1.25
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2016-01-11 00:01
debug_locks.h
1.48
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debugfs.h
9.86
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debugobjects.h
3.65
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2016-01-11 00:01
delay.h
1.39
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2016-01-11 00:01
delayacct.h
4
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2016-01-11 00:01
dell-led.h
133
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2016-01-11 00:01
devcoredump.h
986
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2016-01-11 00:01
devfreq-event.h
5.64
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devfreq.h
10.5
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2016-01-11 00:01
devfreq_cooling.h
2.56
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2021-04-16 11:57
device-mapper.h
16.3
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2021-04-16 11:57
device.h
47.02
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device_cgroup.h
597
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devpts_fs.h
1.1
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digsig.h
1.35
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dim.h
8.98
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dio.h
10.93
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dirent.h
177
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dlm.h
6.01
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dlm_plock.h
678
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dm-dirty-log.h
3.94
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1.91
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2.85
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3.11
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dm9000.h
1.11
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dma-attrs.h
1.87
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dma-buf.h
8.85
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dma-contiguous.h
4.45
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dma-debug.h
5.09
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dma-direction.h
299
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dma-iommu.h
2.73
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dma-mapping.h
9.4
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dma_remapping.h
1.38
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dmaengine.h
40.34
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dmapool.h
1.09
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2016-01-11 00:01
dmar.h
7.82
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dmi.h
4.01
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dnotify.h
1008
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dns_resolver.h
1.31
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dqblk_qtree.h
2.06
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dqblk_v1.h
288
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dqblk_v2.h
367
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drbd.h
10.26
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drbd_genl.h
15.8
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drbd_genl_api.h
1.73
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drbd_limits.h
7.09
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ds1286.h
1.19
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ds17287rtc.h
2.61
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ds2782_battery.h
119
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dtlk.h
3.46
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2016-01-11 00:01
dw_apb_timer.h
1.71
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dynamic_debug.h
3.91
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dynamic_queue_limits.h
3.66
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earlycpio.h
320
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ecryptfs.h
3.79
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edac.h
24.46
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edd.h
1.43
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edma.h
807
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eeprom_93cx6.h
2.94
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eeprom_93xx46.h
422
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efi-bgrt.h
427
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efi.h
37.01
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efs_vh.h
1.51
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eisa.h
2.92
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2016-01-11 00:01
elevator.h
6.94
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elf-fdpic.h
2.18
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2016-01-11 00:01
elf-randomize.h
544
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2016-01-11 00:01
elf.h
1.44
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elfcore-compat.h
1.2
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elfcore.h
2.42
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elfnote.h
3.5
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enclosure.h
4.6
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err.h
1.48
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errno.h
1.24
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errqueue.h
450
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etherdevice.h
13.77
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ethtool.h
15.11
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eventfd.h
2.05
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eventpoll.h
2.01
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evm.h
2.48
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export.h
2.73
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exportfs.h
7.78
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ext2_fs.h
928
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extcon.h
11.03
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f2fs_fs.h
16.54
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f75375s.h
541
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falloc.h
719
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fanotify.h
206
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fault-inject.h
1.84
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fb.h
28.61
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2021-04-16 11:57
fcdevice.h
988
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fcntl.h
1.23
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fd.h
451
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fddidevice.h
1.08
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fdtable.h
3.2
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fec.h
609
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2016-01-11 00:01
fence.h
12.72
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file.h
1.79
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filter.h
16.17
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fips.h
128
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firewire.h
13.36
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firmware-map.h
1.32
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firmware.h
2.01
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fixp-arith.h
4.41
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flat.h
1.58
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flex_array.h
2.43
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flex_proportions.h
2.78
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fmc-sdb.h
1.25
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fmc.h
8.34
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font.h
1.6
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freezer.h
8.65
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frontswap.h
2.69
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fs.h
101.49
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fs_enet_pd.h
3.38
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fs_pin.h
580
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fs_stack.h
772
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fs_struct.h
999
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fs_uart_pd.h
1.49
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fscache-cache.h
18.39
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fscache.h
27.87
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fsl-diu-fb.h
4.08
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fsl_devices.h
4.28
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fsl_hypervisor.h
2.76
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fsl_ifc.h
24.76
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fsldma.h
398
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fsnotify.h
7.68
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fsnotify_backend.h
16.77
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ftrace.h
29
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ftrace_irq.h
298
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2016-01-11 00:01
futex.h
2.35
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fwnode.h
630
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gameport.h
5.56
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gcd.h
154
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genalloc.h
4.84
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genetlink.h
1.35
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genhd.h
22.75
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genl_magic_func.h
11.91
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genl_magic_struct.h
7.47
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2021-04-16 11:57
getcpu.h
602
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2016-01-11 00:01
gfp.h
21.65
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glob.h
217
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goldfish.h
566
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gpio-fan.h
802
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2016-01-11 00:01
gpio-pxa.h
532
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gpio.h
5.15
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gpio_keys.h
1.66
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gpio_mouse.h
1.46
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hardirq.h
1.7
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hash.h
2.67
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hashtable.h
6.46
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hdlc.h
3.43
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hdlcdrv.h
6.28
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hdmi.h
9.27
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hid-debug.h
2.07
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hid-roccat.h
688
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2016-01-11 00:01
hid-sensor-hub.h
8.67
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hid-sensor-ids.h
6.66
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hid.h
34.79
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hiddev.h
1.88
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hidraw.h
1.49
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highmem.h
5.8
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highuid.h
3.08
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hil.h
18.42
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hil_mlc.h
5.13
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hippidevice.h
1.29
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2016-01-11 00:01
host1x.h
7.72
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hp_sdc.h
14.02
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hpet.h
2.52
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hrtimer.h
14.1
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2021-04-16 11:57
htcpld.h
578
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htirq.h
1.04
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huge_mm.h
6.97
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hugetlb.h
15.3
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hugetlb_cgroup.h
2.97
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hugetlb_inline.h
329
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hw_breakpoint.h
3.81
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hw_random.h
2.11
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hwmon-sysfs.h
1.98
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hwmon-vid.h
1.48
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hwmon.h
1.01
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hwspinlock.h
11.06
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2016-01-11 00:01
hyperv.h
42.12
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i2c-algo-bit.h
2.24
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i2c-algo-pca.h
2.85
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2021-04-16 11:57
i2c-algo-pcf.h
1.88
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i2c-dev.h
1.03
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2016-01-11 00:01
i2c-gpio.h
1.31
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2016-01-11 00:01
i2c-mux-gpio.h
1.35
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i2c-mux-pinctrl.h
1.44
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i2c-mux.h
1.64
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2016-01-11 00:01
i2c-ocores.h
757
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i2c-omap.h
1.17
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i2c-pca-platform.h
402
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i2c-pnx.h
923
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i2c-pxa.h
399
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i2c-smbus.h
1.72
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i2c-xiic.h
1.41
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i2c.h
24.57
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i7300_idle.h
1.91
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i8042.h
2.14
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i8253.h
809
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icmp.h
863
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2016-01-11 00:01
icmpv6.h
1.11
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ide.h
45.45
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idr.h
5.49
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2016-01-11 00:01
ieee80211.h
76.64
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2021-04-16 11:57
ieee802154.h
9.65
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2016-01-11 00:01
if_arp.h
1.52
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if_bridge.h
1.98
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if_eql.h
1.07
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if_ether.h
1.35
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if_fddi.h
3.44
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2016-01-11 00:01
if_frad.h
2.88
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if_link.h
495
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2016-01-11 00:01
if_ltalk.h
149
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if_macvlan.h
2.83
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2016-01-11 00:01
if_phonet.h
274
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if_pppol2tp.h
727
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if_pppox.h
3.11
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if_team.h
7.52
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if_tun.h
1011
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if_tunnel.h
370
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if_vlan.h
17.76
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igmp.h
4.24
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ihex.h
1.92
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ima.h
1.95
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in.h
2.43
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in6.h
1.85
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inet.h
2.61
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inet_diag.h
1.44
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inet_lro.h
3.58
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inetdevice.h
7.72
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init.h
9.58
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init_ohci1394_dma.h
157
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init_task.h
7.44
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initrd.h
583
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inotify.h
657
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2016-01-11 00:01
input-polldev.h
2.17
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input.h
18.49
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integrity.h
1.02
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2016-01-11 00:01
intel-iommu.h
17.05
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intel-svm.h
4.33
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2016-01-11 00:01
intel_pmic_gpio.h
372
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2016-01-11 00:01
interrupt.h
19.76
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interval_tree.h
757
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interval_tree_generic.h
6.96
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io-64-nonatomic-hi-lo.h
610
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io-64-nonatomic-lo-hi.h
610
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io-mapping.h
3.71
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io.h
5.27
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ioc3.h
3.14
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ioc4.h
5.78
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mutex-debug.h
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node.h
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nodemask.h
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nospec.h
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notifier.h
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nsproxy.h
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nvmem-consumer.h
4.11
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nvmem-provider.h
1.06
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4.19
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4.37
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1.4
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olpc-ec.h
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9.94
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once.h
1.65
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3.17
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openvswitch.h
844
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6.1
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1
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3.08
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pagevec.h
1.7
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parport.h
17.82
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parport_pc.h
6.52
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parser.h
982
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pata_arasan_cf_data.h
1.22
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patchkey.h
718
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path.h
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999
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pci-acpi.h
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pci-aspm.h
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pci-ats.h
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415
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pci-ecam.h
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pci.h
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pci_hotplug.h
6.79
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pci_ids.h
116.76
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pcieport_if.h
2.16
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pda_power.h
1.12
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pe.h
15.48
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percpu-defs.h
18.81
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percpu-refcount.h
9.92
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percpu-rwsem.h
1.47
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percpu.h
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percpu_counter.h
4.21
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percpu_ida.h
2.28
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perf_event.h
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perf_regs.h
969
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personality.h
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385
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phonet.h
1.12
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phy.h
26.59
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phy_fixed.h
1.58
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pid.h
5.83
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pid_namespace.h
2.35
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pim.h
518
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pipe_fs_i.h
5.4
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pktcdvd.h
5.87
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pl320-ipc.h
758
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platform_device.h
12.37
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plist.h
8.69
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pm-trace.h
728
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32.04
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1.68
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2.12
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4.09
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8.28
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6.18
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2.3
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poison.h
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poll.h
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posix-clock.h
5.44
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posix-timers.h
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posix_acl.h
3.58
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posix_acl_xattr.h
2.2
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power_supply.h
12.09
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powercap.h
12.58
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ppp-comp.h
3.1
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3.07
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ppp_defs.h
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pps-gpio.h
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3.56
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pr.h
527
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prandom.h
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preempt.h
8.61
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prefetch.h
1.5
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proc_fs.h
3.19
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proc_ns.h
2.18
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profile.h
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projid.h
2.18
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property.h
7.54
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proportions.h
3.19
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psci.h
1.79
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pstore.h
2.54
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pstore_ram.h
2.7
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pti.h
1.53
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ptp_classify.h
2.89
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ptp_clock_kernel.h
6.52
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ptrace.h
15.21
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pvclock_gtod.h
509
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pwm.h
8.44
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pwm_backlight.h
701
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pxa168_eth.h
689
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pxa2xx_ssp.h
9.75
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qcom_scm.h
1.25
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qnx6_fs.h
3.23
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quicklist.h
2.1
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quota.h
18.12
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quotaops.h
10.15
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radix-tree.h
17.93
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raid_class.h
2.08
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ramfs.h
723
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random.h
1.81
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range.h
612
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ras.h
352
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ratelimit.h
1.89
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rational.h
600
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rbtree.h
4.38
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rbtree_augmented.h
7.5
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rbtree_latch.h
6.58
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rcu_sync.h
2.51
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rculist.h
19.93
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rculist_bl.h
4.32
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rculist_nulls.h
4.3
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rcupdate.h
40.18
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rcutiny.h
4.31
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rcutree.h
3.64
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reboot.h
1.91
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reciprocal_div.h
993
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regmap.h
35.16
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regset.h
13
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relay.h
8.61
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remoteproc.h
17.47
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reservation.h
4.41
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reset-controller.h
1.89
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reset.h
2.38
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resource.h
306
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resource_ext.h
2.22
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rfkill-gpio.h
1.13
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rfkill-regulator.h
1.38
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rfkill.h
9.49
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rhashtable.h
27.07
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ring_buffer.h
6.7
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rio.h
16.47
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rio_drv.h
14.01
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rio_ids.h
1.22
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rio_regs.h
14.73
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rmap.h
8.04
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rndis.h
16.83
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root_dev.h
540
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rotary_encoder.h
362
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rpmsg.h
11.41
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rslib.h
2.99
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rtc-ds2404.h
467
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rtc-v3020.h
1.03
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rtc.h
6.9
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rtmutex.h
2.82
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rtnetlink.h
3.9
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rwlock.h
4.29
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rwlock_api_smp.h
7.63
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rwlock_types.h
1.18
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rwsem-spinlock.h
1.47
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rwsem.h
5.12
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rxrpc.h
2.33
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2016-01-11 00:01
s3c_adc_battery.h
932
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sa11x0-dma.h
572
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scatterlist.h
11.58
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scc.h
2.8
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sched.h
94.27
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sched_clock.h
559
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scif.h
58.85
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scpi_protocol.h
2.36
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screen_info.h
152
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sctp.h
21.93
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scx200.h
1.78
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scx200_gpio.h
2.34
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sdb.h
4.13
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sdla.h
6.9
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seccomp.h
2.7
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securebits.h
200
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security.h
44.34
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selection.h
1.34
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selinux.h
910
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sem.h
1.3
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semaphore.h
1.36
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seq_buf.h
3.11
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seq_file.h
6.63
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seq_file_net.h
674
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seqlock.h
16.34
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seqno-fence.h
3.91
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serial.h
630
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serial_8250.h
5.35
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serial_bcm63xx.h
4.69
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serial_core.h
16.06
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serial_max3100.h
1.39
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serial_pnx8xxx.h
2.61
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serial_s3c.h
9.24
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serial_sci.h
1.78
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serio.h
4.38
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sfi.h
5.73
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sfi_acpi.h
3.39
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sh_clk.h
6.09
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sh_dma.h
3.61
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sh_eth.h
396
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sh_intc.h
3.39
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sh_timer.h
133
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shdma-base.h
4.41
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shm.h
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Save
Rename
/* * Framework and drivers for configuring and reading different PHYs * Based on code in sungem_phy.c and gianfar_phy.c * * Author: Andy Fleming * * Copyright (c) 2004 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * */ #ifndef __PHY_H #define __PHY_H #include <linux/spinlock.h> #include <linux/ethtool.h> #include <linux/mii.h> #include <linux/module.h> #include <linux/timer.h> #include <linux/workqueue.h> #include <linux/mod_devicetable.h> #include <linux/atomic.h> #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ SUPPORTED_TP | \ SUPPORTED_MII) #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ SUPPORTED_10baseT_Full) #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ SUPPORTED_100baseT_Full) #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ SUPPORTED_1000baseT_Full) #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \ PHY_100BT_FEATURES | \ PHY_DEFAULT_FEATURES) #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ PHY_1000BT_FEATURES) /* * Set phydev->irq to PHY_POLL if interrupts are not supported, * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if * the attached driver handles the interrupt */ #define PHY_POLL -1 #define PHY_IGNORE_INTERRUPT -2 #define PHY_HAS_INTERRUPT 0x00000001 #define PHY_HAS_MAGICANEG 0x00000002 #define PHY_IS_INTERNAL 0x00000004 /* Interface Mode definitions */ typedef enum { PHY_INTERFACE_MODE_NA, PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_SGMII, PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_REVMII, PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID, PHY_INTERFACE_MODE_RGMII_TXID, PHY_INTERFACE_MODE_RTBI, PHY_INTERFACE_MODE_SMII, PHY_INTERFACE_MODE_XGMII, PHY_INTERFACE_MODE_MOCA, PHY_INTERFACE_MODE_QSGMII, PHY_INTERFACE_MODE_MAX, } phy_interface_t; /** * It maps 'enum phy_interface_t' found in include/linux/phy.h * into the device tree binding of 'phy-mode', so that Ethernet * device driver can get phy interface from device tree. */ static inline const char *phy_modes(phy_interface_t interface) { switch (interface) { case PHY_INTERFACE_MODE_NA: return ""; case PHY_INTERFACE_MODE_MII: return "mii"; case PHY_INTERFACE_MODE_GMII: return "gmii"; case PHY_INTERFACE_MODE_SGMII: return "sgmii"; case PHY_INTERFACE_MODE_TBI: return "tbi"; case PHY_INTERFACE_MODE_REVMII: return "rev-mii"; case PHY_INTERFACE_MODE_RMII: return "rmii"; case PHY_INTERFACE_MODE_RGMII: return "rgmii"; case PHY_INTERFACE_MODE_RGMII_ID: return "rgmii-id"; case PHY_INTERFACE_MODE_RGMII_RXID: return "rgmii-rxid"; case PHY_INTERFACE_MODE_RGMII_TXID: return "rgmii-txid"; case PHY_INTERFACE_MODE_RTBI: return "rtbi"; case PHY_INTERFACE_MODE_SMII: return "smii"; case PHY_INTERFACE_MODE_XGMII: return "xgmii"; case PHY_INTERFACE_MODE_MOCA: return "moca"; case PHY_INTERFACE_MODE_QSGMII: return "qsgmii"; default: return "unknown"; } } #define PHY_INIT_TIMEOUT 100000 #define PHY_STATE_TIME 1 #define PHY_FORCE_TIMEOUT 10 #define PHY_AN_TIMEOUT 10 #define PHY_MAX_ADDR 32 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ #define PHY_ID_FMT "%s:%02x" #define MII_BUS_ID_SIZE 61 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ #define MII_ADDR_C45 (1<<30) struct device; struct sk_buff; /* * The Bus class for PHYs. Devices which provide access to * PHYs should register using this structure */ struct mii_bus { struct module *owner; const char *name; char id[MII_BUS_ID_SIZE]; void *priv; int (*read)(struct mii_bus *bus, int phy_id, int regnum); int (*write)(struct mii_bus *bus, int phy_id, int regnum, u16 val); int (*reset)(struct mii_bus *bus); /* * A lock to ensure that only one thing can read/write * the MDIO bus at a time */ struct mutex mdio_lock; struct device *parent; enum { MDIOBUS_ALLOCATED = 1, MDIOBUS_REGISTERED, MDIOBUS_UNREGISTERED, MDIOBUS_RELEASED, } state; struct device dev; /* list of all PHYs on bus */ struct phy_device *phy_map[PHY_MAX_ADDR]; /* PHY addresses to be ignored when probing */ u32 phy_mask; /* PHY addresses to ignore the TA/read failure */ u32 phy_ignore_ta_mask; /* * Pointer to an array of interrupts, each PHY's * interrupt at the index matching its address */ int *irq; }; #define to_mii_bus(d) container_of(d, struct mii_bus, dev) struct mii_bus *mdiobus_alloc_size(size_t); static inline struct mii_bus *mdiobus_alloc(void) { return mdiobus_alloc_size(0); } int __mdiobus_register(struct mii_bus *bus, struct module *owner); #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) void mdiobus_unregister(struct mii_bus *bus); void mdiobus_free(struct mii_bus *bus); struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) { return devm_mdiobus_alloc_size(dev, 0); } void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum); int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); int mdiobus_write_nested(struct mii_bus *bus, int addr, u32 regnum, u16 val); #define PHY_INTERRUPT_DISABLED 0x0 #define PHY_INTERRUPT_ENABLED 0x80000000 /* PHY state machine states: * * DOWN: PHY device and driver are not ready for anything. probe * should be called if and only if the PHY is in this state, * given that the PHY device exists. * - PHY driver probe function will, depending on the PHY, set * the state to STARTING or READY * * STARTING: PHY device is coming up, and the ethernet driver is * not ready. PHY drivers may set this in the probe function. * If they do, they are responsible for making sure the state is * eventually set to indicate whether the PHY is UP or READY, * depending on the state when the PHY is done starting up. * - PHY driver will set the state to READY * - start will set the state to PENDING * * READY: PHY is ready to send and receive packets, but the * controller is not. By default, PHYs which do not implement * probe will be set to this state by phy_probe(). If the PHY * driver knows the PHY is ready, and the PHY state is STARTING, * then it sets this STATE. * - start will set the state to UP * * PENDING: PHY device is coming up, but the ethernet driver is * ready. phy_start will set this state if the PHY state is * STARTING. * - PHY driver will set the state to UP when the PHY is ready * * UP: The PHY and attached device are ready to do work. * Interrupts should be started here. * - timer moves to AN * * AN: The PHY is currently negotiating the link state. Link is * therefore down for now. phy_timer will set this state when it * detects the state is UP. config_aneg will set this state * whenever called with phydev->autoneg set to AUTONEG_ENABLE. * - If autonegotiation finishes, but there's no link, it sets * the state to NOLINK. * - If aneg finishes with link, it sets the state to RUNNING, * and calls adjust_link * - If autonegotiation did not finish after an arbitrary amount * of time, autonegotiation should be tried again if the PHY * supports "magic" autonegotiation (back to AN) * - If it didn't finish, and no magic_aneg, move to FORCING. * * NOLINK: PHY is up, but not currently plugged in. * - If the timer notes that the link comes back, we move to RUNNING * - config_aneg moves to AN * - phy_stop moves to HALTED * * FORCING: PHY is being configured with forced settings * - if link is up, move to RUNNING * - If link is down, we drop to the next highest setting, and * retry (FORCING) after a timeout * - phy_stop moves to HALTED * * RUNNING: PHY is currently up, running, and possibly sending * and/or receiving packets * - timer will set CHANGELINK if we're polling (this ensures the * link state is polled every other cycle of this state machine, * which makes it every other second) * - irq will set CHANGELINK * - config_aneg will set AN * - phy_stop moves to HALTED * * CHANGELINK: PHY experienced a change in link state * - timer moves to RUNNING if link * - timer moves to NOLINK if the link is down * - phy_stop moves to HALTED * * HALTED: PHY is up, but no polling or interrupts are done. Or * PHY is in an error state. * * - phy_start moves to RESUMING * * RESUMING: PHY was halted, but now wants to run again. * - If we are forcing, or aneg is done, timer moves to RUNNING * - If aneg is not done, timer moves to AN * - phy_stop moves to HALTED */ enum phy_state { PHY_DOWN = 0, PHY_STARTING, PHY_READY, PHY_PENDING, PHY_UP, PHY_AN, PHY_RUNNING, PHY_NOLINK, PHY_FORCING, PHY_CHANGELINK, PHY_HALTED, PHY_RESUMING }; /** * struct phy_c45_device_ids - 802.3-c45 Device Identifiers * @devices_in_package: Bit vector of devices present. * @device_ids: The device identifer for each present device. */ struct phy_c45_device_ids { u32 devices_in_package; u32 device_ids[8]; }; /* phy_device: An instance of a PHY * * drv: Pointer to the driver for this PHY instance * bus: Pointer to the bus this PHY is on * dev: driver model device structure for this PHY * phy_id: UID for this device found during discovery * c45_ids: 802.3-c45 Device Identifers if is_c45. * is_c45: Set to true if this phy uses clause 45 addressing. * is_internal: Set to true if this phy is internal to a MAC. * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. * has_fixups: Set to true if this phy has fixups/quirks. * suspended: Set to true if this phy has been suspended successfully. * state: state of the PHY for management purposes * dev_flags: Device-specific flags used by the PHY driver. * addr: Bus address of PHY * link_timeout: The number of timer firings to wait before the * giving up on the current attempt at acquiring a link * irq: IRQ number of the PHY's interrupt (-1 if none) * phy_timer: The timer for handling the state machine * phy_queue: A work_queue for the interrupt * attached_dev: The attached enet driver's device instance ptr * adjust_link: Callback for the enet controller to respond to * changes in the link state. * * speed, duplex, pause, supported, advertising, lp_advertising, * and autoneg are used like in mii_if_info * * interrupts currently only supports enabled or disabled, * but could be changed in the future to support enabling * and disabling specific interrupts * * Contains some infrastructure for polling and interrupt * handling, as well as handling shifts in PHY hardware state */ struct phy_device { /* Information about the PHY type */ /* And management functions */ struct phy_driver *drv; struct mii_bus *bus; struct device dev; u32 phy_id; struct phy_c45_device_ids c45_ids; bool is_c45; bool is_internal; bool is_pseudo_fixed_link; bool has_fixups; bool suspended; enum phy_state state; u32 dev_flags; phy_interface_t interface; /* Bus address of the PHY (0-31) */ int addr; /* * forced speed & duplex (no autoneg) * partner speed & duplex & pause (autoneg) */ int speed; int duplex; int pause; int asym_pause; /* The most recently read link state */ int link; /* Enabled Interrupts */ u32 interrupts; /* Union of PHY and Attached devices' supported modes */ /* See mii.h for more info */ u32 supported; u32 advertising; u32 lp_advertising; int autoneg; int link_timeout; /* * Interrupt number for this PHY * -1 means no interrupt */ int irq; /* private data pointer */ /* For use by PHYs to maintain extra state */ void *priv; /* Interrupt and Polling infrastructure */ struct work_struct phy_queue; struct delayed_work state_queue; atomic_t irq_disable; struct mutex lock; struct net_device *attached_dev; u8 mdix; void (*adjust_link)(struct net_device *dev); }; #define to_phy_device(d) container_of(d, struct phy_device, dev) /* struct phy_driver: Driver structure for a particular PHY type * * phy_id: The result of reading the UID registers of this PHY * type, and ANDing them with the phy_id_mask. This driver * only works for PHYs with IDs which match this field * name: The friendly name of this PHY type * phy_id_mask: Defines the important bits of the phy_id * features: A list of features (speed, duplex, etc) supported * by this PHY * flags: A bitfield defining certain other features this PHY * supports (like interrupts) * driver_data: static driver data * * The drivers must implement config_aneg and read_status. All * other functions are optional. Note that none of these * functions should be called from interrupt time. The goal is * for the bus read/write functions to be able to block when the * bus transaction is happening, and be freed up by an interrupt * (The MPC85xx has this ability, though it is not currently * supported in the driver). */ struct phy_driver { u32 phy_id; char *name; unsigned int phy_id_mask; u32 features; u32 flags; const void *driver_data; /* * Called to issue a PHY software reset */ int (*soft_reset)(struct phy_device *phydev); /* * Called to initialize the PHY, * including after a reset */ int (*config_init)(struct phy_device *phydev); /* * Called during discovery. Used to set * up device-specific structures, if any */ int (*probe)(struct phy_device *phydev); /* PHY Power Management */ int (*suspend)(struct phy_device *phydev); int (*resume)(struct phy_device *phydev); /* * Configures the advertisement and resets * autonegotiation if phydev->autoneg is on, * forces the speed to the current settings in phydev * if phydev->autoneg is off */ int (*config_aneg)(struct phy_device *phydev); /* Determines the auto negotiation result */ int (*aneg_done)(struct phy_device *phydev); /* Determines the negotiated speed and duplex */ int (*read_status)(struct phy_device *phydev); /* Clears any pending interrupts */ int (*ack_interrupt)(struct phy_device *phydev); /* Enables or disables interrupts */ int (*config_intr)(struct phy_device *phydev); /* * Checks if the PHY generated an interrupt. * For multi-PHY devices with shared PHY interrupt pin */ int (*did_interrupt)(struct phy_device *phydev); /* Clears up any memory if needed */ void (*remove)(struct phy_device *phydev); /* Returns true if this is a suitable driver for the given * phydev. If NULL, matching is based on phy_id and * phy_id_mask. */ int (*match_phy_device)(struct phy_device *phydev); /* Handles ethtool queries for hardware time stamping. */ int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); /* * Requests a Rx timestamp for 'skb'. If the skb is accepted, * the phy driver promises to deliver it using netif_rx() as * soon as a timestamp becomes available. One of the * PTP_CLASS_ values is passed in 'type'. The function must * return true if the skb is accepted for delivery. */ bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); /* * Requests a Tx timestamp for 'skb'. The phy driver promises * to deliver it using skb_complete_tx_timestamp() as soon as a * timestamp becomes available. One of the PTP_CLASS_ values * is passed in 'type'. */ void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); /* Some devices (e.g. qnap TS-119P II) require PHY register changes to * enable Wake on LAN, so set_wol is provided to be called in the * ethernet driver's set_wol function. */ int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); /* See set_wol, but for checking whether Wake on LAN is enabled. */ void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); /* * Called to inform a PHY device driver when the core is about to * change the link state. This callback is supposed to be used as * fixup hook for drivers that need to take action when the link * state changes. Drivers are by no means allowed to mess with the * PHY device structure in their implementations. */ void (*link_change_notify)(struct phy_device *dev); /* A function provided by a phy specific driver to override the * the PHY driver framework support for reading a MMD register * from the PHY. If not supported, return -1. This function is * optional for PHY specific drivers, if not provided then the * default MMD read function is used by the PHY framework. */ int (*read_mmd_indirect)(struct phy_device *dev, int ptrad, int devnum, int regnum); /* A function provided by a phy specific driver to override the * the PHY driver framework support for writing a MMD register * from the PHY. This function is optional for PHY specific drivers, * if not provided then the default MMD read function is used by * the PHY framework. */ void (*write_mmd_indirect)(struct phy_device *dev, int ptrad, int devnum, int regnum, u32 val); /* Get the size and type of the eeprom contained within a plug-in * module */ int (*module_info)(struct phy_device *dev, struct ethtool_modinfo *modinfo); /* Get the eeprom information from the plug-in module */ int (*module_eeprom)(struct phy_device *dev, struct ethtool_eeprom *ee, u8 *data); struct device_driver driver; }; #define to_phy_driver(d) container_of(d, struct phy_driver, driver) #define PHY_ANY_ID "MATCH ANY PHY" #define PHY_ANY_UID 0xffffffff /* A Structure for boards to register fixups with the PHY Lib */ struct phy_fixup { struct list_head list; char bus_id[MII_BUS_ID_SIZE + 3]; u32 phy_uid; u32 phy_uid_mask; int (*run)(struct phy_device *phydev); }; /** * phy_read_mmd - Convenience function for reading a register * from an MMD on a given PHY. * @phydev: The phy_device struct * @devad: The MMD to read from * @regnum: The register on the MMD to read * * Same rules as for phy_read(); */ static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) { if (!phydev->is_c45) return -EOPNOTSUPP; return mdiobus_read(phydev->bus, phydev->addr, MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); } /** * phy_read_mmd_indirect - reads data from the MMD registers * @phydev: The PHY device bus * @prtad: MMD Address * @devad: MMD DEVAD * @addr: PHY address on the MII bus * * Description: it reads data from the MMD registers (clause 22 to access to * clause 45) of the specified phy address. */ int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad, int addr); /** * phy_read - Convenience function for reading a given PHY register * @phydev: the phy_device struct * @regnum: register number to read * * NOTE: MUST NOT be called from interrupt context, * because the bus read/write functions may wait for an interrupt * to conclude the operation. */ static inline int phy_read(struct phy_device *phydev, u32 regnum) { return mdiobus_read(phydev->bus, phydev->addr, regnum); } /** * phy_write - Convenience function for writing a given PHY register * @phydev: the phy_device struct * @regnum: register number to write * @val: value to write to @regnum * * NOTE: MUST NOT be called from interrupt context, * because the bus read/write functions may wait for an interrupt * to conclude the operation. */ static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) { return mdiobus_write(phydev->bus, phydev->addr, regnum, val); } /** * phy_interrupt_is_valid - Convenience function for testing a given PHY irq * @phydev: the phy_device struct * * NOTE: must be kept in sync with addition/removal of PHY_POLL and * PHY_IGNORE_INTERRUPT */ static inline bool phy_interrupt_is_valid(struct phy_device *phydev) { return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; } /** * phy_is_internal - Convenience function for testing if a PHY is internal * @phydev: the phy_device struct */ static inline bool phy_is_internal(struct phy_device *phydev) { return phydev->is_internal; } /** * phy_interface_mode_is_rgmii - Convenience function for testing if a * PHY interface mode is RGMII (all variants) * @mode: the phy_interface_t enum */ static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) { return mode >= PHY_INTERFACE_MODE_RGMII && mode <= PHY_INTERFACE_MODE_RGMII_TXID; }; /** * phy_interface_is_rgmii - Convenience function for testing if a PHY interface * is RGMII (all variants) * @phydev: the phy_device struct */ static inline bool phy_interface_is_rgmii(struct phy_device *phydev) { return phydev->interface >= PHY_INTERFACE_MODE_RGMII && phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; }; /* * phy_is_pseudo_fixed_link - Convenience function for testing if this * PHY is the CPU port facing side of an Ethernet switch, or similar. * @phydev: the phy_device struct */ static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) { return phydev->is_pseudo_fixed_link; } /** * phy_write_mmd - Convenience function for writing a register * on an MMD on a given PHY. * @phydev: The phy_device struct * @devad: The MMD to read from * @regnum: The register on the MMD to read * @val: value to write to @regnum * * Same rules as for phy_write(); */ static inline int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) { if (!phydev->is_c45) return -EOPNOTSUPP; regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); return mdiobus_write(phydev->bus, phydev->addr, regnum, val); } /** * phy_write_mmd_indirect - writes data to the MMD registers * @phydev: The PHY device * @prtad: MMD Address * @devad: MMD DEVAD * @addr: PHY address on the MII bus * @data: data to write in the MMD register * * Description: Write data from the MMD registers of the specified * phy address. */ void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad, int addr, u32 data); struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, bool is_c45, struct phy_c45_device_ids *c45_ids); struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); int phy_device_register(struct phy_device *phy); void phy_device_remove(struct phy_device *phydev); int phy_init_hw(struct phy_device *phydev); int phy_suspend(struct phy_device *phydev); int phy_resume(struct phy_device *phydev); struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, phy_interface_t interface); struct phy_device *phy_find_first(struct mii_bus *bus); int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, u32 flags, phy_interface_t interface); int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, void (*handler)(struct net_device *), phy_interface_t interface); struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, void (*handler)(struct net_device *), phy_interface_t interface); void phy_disconnect(struct phy_device *phydev); void phy_detach(struct phy_device *phydev); void phy_start(struct phy_device *phydev); void phy_stop(struct phy_device *phydev); int phy_start_aneg(struct phy_device *phydev); int phy_stop_interrupts(struct phy_device *phydev); static inline int phy_read_status(struct phy_device *phydev) { return phydev->drv->read_status(phydev); } int genphy_config_init(struct phy_device *phydev); int genphy_setup_forced(struct phy_device *phydev); int genphy_restart_aneg(struct phy_device *phydev); int genphy_config_aneg(struct phy_device *phydev); int genphy_aneg_done(struct phy_device *phydev); int genphy_update_link(struct phy_device *phydev); int genphy_read_status(struct phy_device *phydev); int genphy_suspend(struct phy_device *phydev); int genphy_resume(struct phy_device *phydev); int genphy_soft_reset(struct phy_device *phydev); static inline int genphy_no_soft_reset(struct phy_device *phydev) { return 0; } void phy_driver_unregister(struct phy_driver *drv); void phy_drivers_unregister(struct phy_driver *drv, int n); int phy_driver_register(struct phy_driver *new_driver); int phy_drivers_register(struct phy_driver *new_driver, int n); void phy_state_machine(struct work_struct *work); void phy_change(struct work_struct *work); void phy_mac_interrupt(struct phy_device *phydev, int new_link); void phy_start_machine(struct phy_device *phydev); void phy_stop_machine(struct phy_device *phydev); int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); int phy_start_interrupts(struct phy_device *phydev); void phy_print_status(struct phy_device *phydev); void phy_device_free(struct phy_device *phydev); int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_register_fixup_for_id(const char *bus_id, int (*run)(struct phy_device *)); int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); int phy_get_eee_err(struct phy_device *phydev); int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); int __init mdio_bus_init(void); void mdio_bus_exit(void); extern struct bus_type mdio_bus_type; /** * module_phy_driver() - Helper macro for registering PHY drivers * @__phy_drivers: array of PHY drivers to register * * Helper macro for PHY drivers which do not do anything special in module * init/exit. Each module may only use this macro once, and calling it * replaces module_init() and module_exit(). */ #define phy_module_driver(__phy_drivers, __count) \ static int __init phy_module_init(void) \ { \ return phy_drivers_register(__phy_drivers, __count); \ } \ module_init(phy_module_init); \ static void __exit phy_module_exit(void) \ { \ phy_drivers_unregister(__phy_drivers, __count); \ } \ module_exit(phy_module_exit) #define module_phy_driver(__phy_drivers) \ phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) #endif /* __PHY_H */